William Lay

Firmware design is where my engineering career began. From my degree through to 2022 I took FPGA designs from initial concept to final design, first in Verilog and SystemVerilog at university and then in VHDL at Roke, verifying them with self-checking testbenches wherever possible.

As Design Lead on a miniaturised Electronic Counter-Measures radio at Roke I owned module architecture, hardware interfaces and driver software, building OpenCPI firmware workers in VHDL with VHDL and Python verification. Earlier projects included an HDMI video test setup to test an optical fibre transceiver as part of a joint research project with the University of Southampton; initial development of a Lane Departure Warning System; and work during an Industrial Placement with the Electronic Warfare Operation Support team at Selex ES (now Leonardo).

Since leaving Roke I have moved on from hands-on firmware to cloud infrastructure and DevOps automation, agile delivery, and managing transitions on complex programmes. The rigour of hardware design still shapes how I approach that work. Read more on the Cloud, DevOps & Automation and Leader pages.

Masters-level study of image processing, video processing, audio processing, and digital signal processing for communications.

This work included writing image filters from low-level operations in MATLAB to improve the performance of Canny Edge Detection, assessed as first class.

Masters-level study of analogue and digital design of silicon devices at micrometer and nanometer scale.

As part of the Advanced Microelectronics course I had a chip fabricated at 350nm with my documented designs, including a Ring Oscillator, an Operational Transconductance Amplifier, and a 4-bit Full Adder.

Masters-level study of mobile, terrestrial and satellite communications systems and protocols, covering both system architectures and designs, and standards and encoding techniques.

My final Masters project was to design an HDMI video test setup to test an optical fibre transceiver, as part of a joint research project with the University of Southampton. The design chose to stream HDMI video over optical fibre using FPGAs, which required a strong working knowledge of communications standards and how to design within them.